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標題 Planar test structures for characterizing impurities in silicon / M.G. Buehler ... [et al.].

出版資料 Washington : U.S. Dept. of Commerce, National Bureau of Standards : For sale by the Supt. of Docs., U.S. Govt. Print. Off., 1976.

複本

說明 v, 25 p. : ill. ; 26 cm.
系列 Semiconductor measurement technology
National Bureau of Standards special publication ; 400-21
NBS special publication ; 400-21.
Notes "Presented as an invited paper ... at the Large-Scale Integration (LSI) Process Technology/Semiconductor Preparation and Characterization Session of the Electrochemical Society Meeting in Toronto, Canada on May 14, 1975."
With: Bound With: A BASIC program for calculating dopant density profiles from capacitance-voltage data / Richard L. Mattis and Martin G. Buehler.
Bibliography Includes bibliographical references.
主題 Semiconductors -- Testing -- Congresses.
Silicon -- Defects -- Congresses.
添加作者 Buehler, Martin G.
政府出版物號碼 C 13.10:400-21